4.2.19

Fetch-Decode-Execute Cycle

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The Fetch, Decode, Execute Cycle

To process instructions and data, the processor needs to retrieve them from memory. To do this, it follows the fetch, decode, execute (FDE) cycle.

Fetch

Fetch

  • The address of the next instruction to be processed is copied from the Program Counter (PC) to the Memory Address Register (MAR).
  • The PC is incremented to point to the next instruction that will be needed when the cycle starts again.
  • The instruction stored at the location held by the MAR is copied to the MDR.
Decode

Decode

  • The Control Unit decodes the instruction and sends control signals to the component within or outside the CPU that needs to act.
Execute

Execute

  • The operation indicated by the instruction is performed by the appropriate component. For example:
    • The Arithmetic Logic Unit (ALU) performs the operation given by the Control Unit.
    • The value stored by the Program Counter or Memory Address Register might be changed.

The Fetch, Decode, Execute Cycle

To process instructions and data, the processor needs to retrieve them from memory. To do this, it follows the fetch, decode, execute (FDE) cycle.

Fetch

Fetch

  • The address of the next instruction to be processed is copied from the Program Counter (PC) to the Memory Address Register (MAR).
  • The PC is incremented to point to the next instruction that will be needed when the cycle starts again.
  • The instruction stored at the location held by the MAR is copied to the MDR.
Decode

Decode

  • The Control Unit decodes the instruction and sends control signals to the component within or outside the CPU that needs to act.
Execute

Execute

  • The operation indicated by the instruction is performed by the appropriate component. For example:
    • The Arithmetic Logic Unit (ALU) performs the operation given by the Control Unit.
    • The value stored by the Program Counter or Memory Address Register might be changed.
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Practice questions on Fetch-Decode-Execute Cycle

Can you answer these? Test yourself with free interactive practice on Seneca — used by over 10 million students.

  1. 1
    The three stages of the CPU cycle are:Fill in the list
  2. 2
    Toggle until all are correct: Which registers are used in the fetch stage?True / false
  3. 3
    What happens during the fetch stage of the fetch, decode, execute cycle?Fill in the list
  4. 4
    During a CPU cycle, the Arithmetic Logic Unit has been activated. During which stage of the FDE cycle was it activated?Multiple choice
  5. 5
    The Fetch Stage of the Fetch, Decode, Execute CyclePut in order
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Registers of the Central Processing Unit (CPU)

Factors Affecting CPU Performance